| Networks on Chips: Technology and Tools Contributor(s): de Micheli, Giovanni (Author), Benini, Luca (Editor), Bertozzi, Davide (Contribution by) |
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ISBN: 0123705215 ISBN-13: 9780123705211 Publisher: Morgan Kaufmann Publishers OUR PRICE: $80.96 Product Type: Hardcover - Other Formats Published: July 2006 Annotation: The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. * Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends * An integrated presentation not currently available in any other book * A thorough introduction to current design methodologies and chips designed with NoCs |
| Additional Information |
| BISAC Categories: - Computers | Systems Architecture - General |
| Dewey: 621.381 |
| LCCN: 2006018657 |
| Series: Morgan Kaufmann Series in Systems on Silicon (Hardcover) |
| Physical Information: 1.12" H x 7.76" W x 9.3" (2.19 lbs) 408 pages |
| Descriptions, Reviews, Etc. |
| Publisher Description: The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. |