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Scalable Shared Memory Multiprocessors Softcover Repri Edition
Contributor(s): DuBois, Michel (Editor), Thakkar, Shreekant S. (Editor)
ISBN: 1461366011     ISBN-13: 9781461366010
Publisher: Springer
OUR PRICE:   $161.49  
Product Type: Paperback - Other Formats
Published: October 2012
Qty:
Additional Information
BISAC Categories:
- Computers | Systems Architecture - Distributed Systems & Computing
- Computers | Systems Architecture - General
Dewey: 004.35
Physical Information: 0.72" H x 6.14" W x 9.21" (1.06 lbs) 329 pages
 
Descriptions, Reviews, Etc.
Publisher Description:
The workshop on Scalable Shared Memory Multiprocessors took place on May 26 and 27 1990 at the Stouffer Madison Hotel in Seattle, Washington as a prelude to the 1990 International Symposium on Computer Architecture. About 100 participants listened for two days to the presentations of 22 invited The motivation for this workshop was to speakers, from academia and industry. promote the free exchange of ideas among researchers working on shared-memory multiprocessor architectures. There was ample opportunity to argue with speakers, and certainly participants did not refrain a bit from doing so. Clearly, the problem of scalability in shared-memory multiprocessors is still a wide-open question. We were even unable to agree on a definition of "scalability". Authors had more than six months to prepare their manuscript, and therefore the papers included in this proceedings are refinements of the speakers' presentations, based on the criticisms received at the workshop. As a result, 17 authors contributed to these proceedings. We wish to thank them for their diligence and care. The contributions in these proceedings can be partitioned into four categories 1. Access Order and Synchronization 2. Performance 3. Cache Protocols and Architectures 4. Distributed Shared Memory Particular topics on which new ideas and results are presented in these proceedings include: efficient schemes for combining networks, formal specification of shared- memory models, correctness of trace-driven simulations, synchronization, various coherence protocols, .