The Gm/Id Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits: The Semi-Empirical and Compact Model Approaches 2010 Edition Contributor(s): Jespers, Paul (Author) |
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ISBN: 1461425050 ISBN-13: 9781461425052 Publisher: Springer OUR PRICE: $132.99 Product Type: Paperback - Other Formats Published: May 2012 |
Additional Information |
BISAC Categories: - Technology & Engineering | Electronics - Circuits - Integrated - Technology & Engineering | Electronics - Semiconductors - Technology & Engineering | Electronics - Microelectronics |
Dewey: 004.1 |
Series: Analog Circuits and Signal Processing |
Physical Information: 0.4" H x 6.14" W x 9.21" (0.60 lbs) 171 pages |
Descriptions, Reviews, Etc. |
Publisher Description: In "The gm/ID Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits", we compare the semi-empirical to the compact model approach. Small numbers of parameters make the compact model attractive for the model paves the way towards analytic expressions unaffordable otherwise. The E.K.V model is a good candidate, but when it comes to short channel devices, compact models are either inaccurate or loose straightforwardness. Because sizing requires basically a reliable large signal representation of MOS transistors, we investigate the potential of the E.K.V model when its parameters are supposed to be bias dependent. The model-driven and semi-empirical methods are compared considering the Intrinsic Gain Stage and a few more complex circuits. A series of MATLAB files found on extras-springer.com allow redoing the tests. |