| A Pipelined Multi-Core Machine with Operating System Support: Hardware Implementation and Correctness Proof 2020 Edition Contributor(s): Lutsyk, Petro (Author), Oberhauser, Jonas (Author), Paul, Wolfgang J. (Author) |
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ISBN: 3030432424 ISBN-13: 9783030432423 Publisher: Springer OUR PRICE: $52.24 Product Type: Paperback Published: May 2020 |
| Additional Information |
| BISAC Categories: - Computers | Programming - General - Computers | Programming Languages - General - Computers | Networking - General |
| Physical Information: 1.3" H x 6.14" W x 9.21" (1.96 lbs) 628 pages |
| Descriptions, Reviews, Etc. |
| Publisher Description: This work is building on results from the book named "A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness" by M. Kovalev, S.M. M ller, and W.J. Paul, published as LNCS 9000 in 2014. It presents, at the gate level, construction and correctness proof of a multi-core machine with pipelined processors and extensive operating system support with the following features: - MIPS instruction set architecture (ISA) for application and for system programming - cache coherent memory system - store buffers in front of the data caches - interrupts and exceptions - memory management units (MMUs)- pipelined processors: the classical five-stage pipeline is extended by two pipeline stages for address translation - local interrupt controller (ICs) supporting inter-processor interrupts (IPIs) - I/O-interrupt controller and a disk
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