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Celator
Contributor(s): Fronte, Daniele (Author)
ISBN: 3838334884     ISBN-13: 9783838334882
Publisher: LAP Lambert Academic Publishing
OUR PRICE:   $50.27  
Product Type: Paperback
Published: June 2010
Qty:
Additional Information
BISAC Categories:
- Computers | Hardware - General
Physical Information: 0.26" H x 6" W x 9" (0.37 lbs) 108 pages
 
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Publisher Description:
Nowadays hi-tech secure products need more services and more security. Furthermore the corresponding market is now oriented towards more flexibility. In this thesis we propose as novel solution a Multi-algorithm Cryptographic Co-processor called Celator. Celator is able to encrypt or decrypt data blocks using private key encryption algorithms such as Advanced Encryption Standard (AES) or Data Encryption Standard (DES). Moreover Celator allows condensing data using the Secure Hash Algorithms (SHA). These algorithms are frequently implemented in hi-tech secure products in software or in hardware mode. Celator belongs to the class of the flexible hardware implementations, and allows an user implementing its own cryptographic algorithm under specific conditions. Celator architecture is based on a 4x4 Processing Elements (PE) systolic array, a Controller with a Finite State Machine (FSM) and a local memory. Data are encrypted or decrypted by the PE array. This thesis presents Celator architecture, as well as its AES, DES, and SHA basic operations. Celator performances are then given and compared to other securitycircuits.