| Memory Management for Synthesis of DSP Software Contributor(s): Murthy, Praveen K. (Author), Bhattacharyya, Shuvra S. (Author) |
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ISBN: 0849337526 ISBN-13: 9780849337529 Publisher: CRC Press OUR PRICE: $266.00 Product Type: Hardcover - Other Formats Published: March 2006 Annotation: Memory Management for Synthesis of DSP Software focuses on techniques for minimizing memory requirements during the synthesis of software from dataflow representations of DSP systems. This book reviews research for compiling synchronous dataflow specifications. Building on the formal foundation of synchronous dataflow-based software synthesis, it discusses recently developed techniques along with underlying theories that optimize memory consumption during compilation of synchronous dataflow specifications. It also describes buffer sharing models and techniques as well as addresses the DSA problem and its various solutions. This text is ideal for electrical and computer engineers. |
| Additional Information |
| BISAC Categories: - Technology & Engineering | Electronics - Microelectronics - Technology & Engineering | Telecommunications - Technology & Engineering | Electrical |
| Dewey: 621.382 |
| LCCN: 2005046691 |
| Physical Information: 320 pages |
| Descriptions, Reviews, Etc. |
| Publisher Description: Although programming in memory-restricted environments is never easy, this holds especially true for digital signal processing (DSP). The data-rich, computation-intensive nature of DSP makes memory management a chief and challenging concern for designers. Memory Management for Synthesis of DSP Software focuses on minimizing memory requirements during the synthesis of DSP software from dataflow representations. Dataflow representations are used in many popular DSP design tools, and the methods of this book can be applied in that context, as well as other contexts where dataflow is used. This book systematically reviews research conducted by the authors on memory minimization techniques for compiling synchronous dataflow (SDF) specifications. Beginning with an overview of the foundations of software synthesis techniques from SDF descriptions, it examines aggressive buffer-sharing techniques that take advantage of specific and quantifiable tradeoffs between code size and buffer size to achieve high levels of buffer memory optimization. The authors outline coarse-level strategies using lifetime analysis and dynamic storage allocation (DSA) for efficient buffer sharing as one approach and demonstrate the role of the CBP (consumed-before-produced) parameter at a finer level using a merging framework for buffer sharing. They present two powerful algorithms for combining these sharing techniques and then introduce techniques that are not restricted to the single appearance scheduling space of the other techniques. Extensively illustrated to clarify the mathematical concepts, Memory Management for Synthesis of DSP Software presents a comprehensive survey of state-of-the-art research in DSP software synthesis. |
