| Residue Number Systems: Algorithms and Architectures 2002 Edition Contributor(s): Mohan, P. V. Ananda (Author) |
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ISBN: 1402070314 ISBN-13: 9781402070310 Publisher: Springer OUR PRICE: $104.49 Product Type: Hardcover - Other Formats Published: April 2002 Annotation: This text is an excellent reference for both professional and academic researchers in the field of VLSI using residue number systems. It is also of interest to those working in the general fields of VLSI design, DSP design, and cryptography. Topics covered include choice of moduli; architectures for conversion from binary to RNS; RNS to binary conversion techniques; quadratic RNS; and applications. Numerous examples illustrate the ideas developed. The area and computational requirements are highlighted for all designs, so the selection of a particular architecture is facilitated. Some of the topics covered have application in cryptography. The book includes a comprehensive bibliography in this area. Residue Number Systems: Algorithms and Architectures is also suitable for a graduate-level course as part of a VLSI curriculum. |
| Additional Information |
| BISAC Categories: - Technology & Engineering | Telecommunications - Computers - Medical |
| Dewey: 621.382 |
| LCCN: 2002025487 |
| Series: The Springer International Engineering and Computer Science |
| Physical Information: 0.85" H x 7.02" W x 8.98" (1.28 lbs) 253 pages |
| Descriptions, Reviews, Etc. |
| Publisher Description: There has been continuing interest in the improvement of the speed of Digital Signal processing. The use of Residue Number Systems for the design of DSP systems has been extensively researched in literature. Szabo and Tanaka have popularized this approach through their book published in 1967. Subsequently, Jenkins and Leon have rekindled the interest of researchers in this area in 1978, from which time there have been several efforts to use RNS in practical system implementation. An IEEE Press book has been published in 1986 which was a collection of Papers. It is very interesting to note that in the recent past since 1988, the research activity has received a new thrust with emphasis on VLSI design using non- ROM based designs as well as ROM based designs as evidenced by the increased publications in this area. The main advantage in using RNS is that several small word-length Processors are used to perform operations such as addition, multiplication and accumulation, subtraction, thus needing less instruction execution time than that needed in conventional 16 bitl32 bit DSPs. However, the disadvantages of RNS have b. een the difficulty of detection of overflow, sign detection, comparison of two numbers, scaling, and division by arbitrary number, RNS to Binary conversion and Binary to RNS conversion. These operations, unfortunately, are computationally intensive and are time consuming. |