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System Level Design from Hw/SW to Memory for Embedded Systems: 5th Ifip Tc 10 International Embedded Systems Symposium, Iess 2015, Foz Do Iguaçu, Braz Softcover Repri Edition
Contributor(s): Götz, Marcelo (Editor), Schirner, Gunar (Editor), Wehrmeister, Marco Aurélio (Editor)
ISBN: 3030079171     ISBN-13: 9783030079178
Publisher: Springer
OUR PRICE:   $52.24  
Product Type: Paperback - Other Formats
Published: December 2018
Qty:
Temporarily out of stock - Will ship within 2 to 5 weeks
Additional Information
BISAC Categories:
- Computers | Expert Systems
- Computers | Networking - General
- Computers | Hardware - General
Dewey: 004.6
Series: IFIP Advances in Information and Communication Technology
Physical Information: 231 pages
 
Descriptions, Reviews, Etc.
Publisher Description:

This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Igua u, Brazil, in November 2015.

The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.