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Fault Diagnosis and Tolerance in Cryptography: Third International Workshop, Fdtc 2006, Yokohama, Japan, October 10, 2006, Proceedings 2006 Edition
Contributor(s): Breveglieri, Luca (Editor), Koren, Israel (Editor), Naccache, David (Editor)
ISBN: 3540462503     ISBN-13: 9783540462507
Publisher: Springer
OUR PRICE:   $52.24  
Product Type: Paperback - Other Formats
Published: September 2006
Qty:
Annotation: This book constitutes the refereed proceedings of the Third International Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2006, held in Yokohama, Japan in October 2006.

The 12 revised papers of FDTC 2006 are presented together with 9 papers from FDTC 2004 and FDTC 2005 that passed a second round of reviewing. They all provide a comprehensive introduction to the issues faced by designers of robust cryptographic devices and to the currently available methodologies and techniques for protecting these devices against fault injection attacks. The papers are organized in topical sections on attacks on public key systems, protection of public key systems, attacks on and protection of symmetric key systems, models for fault attacks on cryptographic devices, fault-resistant arithmetic for cryptography, as well as fault attacks and other security threats.

Additional Information
BISAC Categories:
- Computers | Operating Systems - General
- Computers | Security - Cryptography
- Computers | System Administration - Storage & Retrieval
Dewey: 005.820
LCCN: 2006933937
Physical Information: 0.61" H x 6.22" W x 9.26" (0.89 lbs) 258 pages
 
Descriptions, Reviews, Etc.
Publisher Description:
In recent years applied cryptography has developed considerably to satisfy the - creasing security requirements of various information technology disciplines, such as telecommunications, networking, database systems, mobile applications and others. Cryptosystems are inherently computationally complex and in order to satisfy the high throughput requirements of many applications, they are often implemented by means of either VLSI devices (cryptographic accelerators) or highly optimized software routines (cryptographic libraries) and are used via suitable (network) protocols. The sophistication of the underlying cryptographic algorithms, the high complexity of the implementations, and the easy access and low cost of cryptographic devices resulted in increased concerns regarding the reliability and security of crypto-devices. The effectiveness of side channel attacks on cryptographic devices, like timing and power-based attacks, has been known for some time. Several recent investigations have demonstrated the need to develop methodologies and techniques for designing robust cryptographic systems (both hardware and software) to protect them against both accidental faults and maliciously injected faults with the purpose of extracting the secret key. This trend has been particularly motivated by the fact that the equipment needed to carry out a successful side channel attack based on fault injection is easily accessible at a relatively low cost (for example, laser beam technology), and that the skills needed to use it are quite common. The identification of side channel attacks based on fault injections and the development of appropriate counter-measures have therefore become an active field of scientific and industrial research.